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基于NAND Flash的ECC校验 认领 引用
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作者 朱振麟 焦新泉 《电子器件》 CAS 2025年第5期1008-1012,共5页
针对NAND Flash在数据存储过程中出现的小几率“位错误”,对数据存储的可靠性带来很大影响的问题,提出基于汉明码的ECC数据检测及纠正算法,可以检测2 bit错误且检测并纠正1 bit错误。选用三星生产的K9WAG08U1A,该芯片一页容量为2 kbyte... 针对NAND Flash在数据存储过程中出现的小几率“位错误”,对数据存储的可靠性带来很大影响的问题,提出基于汉明码的ECC数据检测及纠正算法,可以检测2 bit错误且检测并纠正1 bit错误。选用三星生产的K9WAG08U1A,该芯片一页容量为2 kbyte,以一页为单位生成ECC校验码,增强可行性的同时可以实现1 bit/2 kbyte的纠错及2 bit/2 kbyte的检错能力。针对传统校验码生成速度慢,影响数据传输速率,提出校验码的预生成机制。测试结果表明,该算法可行性强,提高了数据传输的速率及可靠性。 展开更多
关键词 NAND Flash 小几率 ECC校验码 可靠性
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Quad-Level Cell NAND Design and Soft-Bit Generation for Low-Density Parity-Check Decoding in System-Level Application 认领 引用
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作者 LIU Shijun ZOU Xuecheng WANG Baocun 《Wuhan University Journal of Natural Sciences》 CAS CSCD 2018年第1期70-78,共9页
QLC(Quad-Level Cell) NAND flash will be one of the future technologies for next generation memory chip after three-dimensional(3D) TLC(Triple-Level Cell) stacked NAND flash. In QLC device, data errors will easil... QLC(Quad-Level Cell) NAND flash will be one of the future technologies for next generation memory chip after three-dimensional(3D) TLC(Triple-Level Cell) stacked NAND flash. In QLC device, data errors will easily occur because of 2~4 data levels in the limited voltage range. This paper studies QLC NAND technology which is 4 bits per cell. QLC programming methods based on 16 voltage levels and reading method based on "half-change" Gray coding are researched. Because of the probable error impact of QLC NAND cell's voltage change, the solution of generating the soft information after XOR(exclusive OR) the soft bits by internal read mechanism is presented for Low-Density Parity-Check(LDPC) Belief Propagation(BP) decoding in QLC design for its system level application. 展开更多
关键词 QLC (Quad-Level Cell)NAND error-correcting codeECC Low-Density Parity-Check (LDPC) Soft-Bit Generation
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