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SPECTRAL ANALYSIS OF SOME INDEPENDENCES OF MULTIPLE-VALUED LOGICAL FUNCTIONS ON THEIR VARIABLES 认领 引用
1
作者 武传坤 《Journal of Electronics(China)》 1993年第3期217-226,共10页
There are many kinds of special relationships between multiple-valued logical func-tions and their variables, and they are difficult to be judged from their expressions. In thispaper, some sufficient and necessary con... There are many kinds of special relationships between multiple-valued logical func-tions and their variables, and they are difficult to be judged from their expressions. In thispaper, some sufficient and necessary conditions of the independence and statistical independenceof multiple-valued logical functions on their variables are given. Some conditions of algebraicindependence of multiple-valued logical functions on some of their variables and the way to de-generate a function to the greatest extent are proposed, and some applications of these resultsare indicated. All the results are studied by using Chrestenson spectral techniques. 展开更多
关键词 Multiple-valued logical function Chrestenson spectrum Degeneration Correlationimmunity Linear code
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CIRCUIT TESTABLE DESIGN AND UNIVERSAL TEST SETS FOR MULTIPLE-VALUED LOGIC FUNCTIONS 认领 引用
2
作者 Pan Zhongliang 《Journal of Electronics(China)》 2007年第1期138-144,共7页
The circuit testable realizations of multiple-valued functions are studied in this letter. First of all,it is shown that one vector detects all skew faults in multiplication modulo circuits or in addi-tion modulo circ... The circuit testable realizations of multiple-valued functions are studied in this letter. First of all,it is shown that one vector detects all skew faults in multiplication modulo circuits or in addi-tion modulo circuits,and n+1 vectors detect all skew faults in the circuit realization of multiple-valued functions with n inputs. Secondly,min(max) bridging fault test sets with n+2 vectors are pre-sented for the circuit realizations of multiple-valued logic functions. Finally,a tree structure is used instead of cascade structure to reduce the delay in the circuit realization,it is shown that three vec-tors are sufficient to detect all single stuck-at faults in the tree structure realization of multiple-valued logic functions. 展开更多
关键词 Multiple-valued logic Testable realization Single faults Bridging faults Skew faults.
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Spectral Characteristics of the Best Affine Approach of Multi-Output m-Valued Logical Functions 认领 引用
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作者 ZHAO Yaqun YING Dinghai FENG Dengguo 《Wuhan University Journal of Natural Sciences》 CAS 2007年第1期185-188,共4页
This paper discusses the best affine approach （BAA） of multi-output m-valued logical functions. First, it gives the spectra of rate of accordance between multi-output m-valued logical functions and their affine func... This paper discusses the best affine approach （BAA） of multi-output m-valued logical functions. First, it gives the spectra of rate of accordance between multi-output m-valued logical functions and their affine functions, then analyzes the BAA of multi-output m-valued logical functions and finally gives the spectral characteristics of BAA of multi-output m-valued logical functions. 展开更多
关键词 multi-output m-valued logical functions linear spectrum cyclic spectrum BAA（best affine approach）
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Analysis of a Class of Logical Functions over Galois and Z_m Rings 认领 引用 被引量：1
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作者 陈卫红 曾洪杰 《Chinese Quarterly Journal of Mathematics》 2002年第4期105-110,共6页
In this paper, the author analyzed some cryptographic properties of a class of logical functions, f(x,y)=(q(x),...,q(x))·y+h(x),over Galois rings and residue rings, presented the relationship between the characte... In this paper, the author analyzed some cryptographic properties of a class of logical functions, f(x,y)=(q(x),...,q(x))·y+h(x),over Galois rings and residue rings, presented the relationship between the character spectrum of f(x,y) and the character speetrum of q(x),h(x) and the relationship between the cryptographic properties of f(x,y) and the cryptographic properties of h(x). 展开更多
关键词 logical function character spectrum cryptographic properties
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LOGICAL SYNTHESIS OF MOLTIVALUED SYMMETRIC FUNCTION BASED ON BINARY FULL ADDERS 认领 引用
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作者 Chen Xiexiong Shen Jizhong 《Journal of Electronics(China)》 1996年第4期360-365,共6页
This paper discusses the definition and properties of multivalued symmetric functions, points out that a multivalued symmetric function can be decomposed according to the value of the function j. The subfunction Lj co... This paper discusses the definition and properties of multivalued symmetric functions, points out that a multivalued symmetric function can be decomposed according to the value of the function j. The subfunction Lj corresponding to j must be a symmetric function, and it may be expressed as the sum of products form of degenerated multivalued fundamental symmetric functions. Based on this consideration, the circuit realization for the multivalued symmetric functions based on full adders is proposed. 展开更多
关键词 Multivalued logic Symmetric functions Logic design
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Design of AB^2 in Galois Fields Based on Multiple-Valued Logic 认领 引用 被引量：1
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作者 Haixia Wu Long He +2 位作者 Xiaoran Li Yilong Bai Minghao Zhang 《Journal of Beijing Institute of Technology》 EI CAS 2019年第4期764-769,共6页
A new AB^2 operation in Galois Field GF(24)is presented and its systolic realization based on multiple-valued logic(MVL)is proposed.The systolic structure of the operation employs multiple-valued current mode(MVCM)by ... A new AB^2 operation in Galois Field GF(24)is presented and its systolic realization based on multiple-valued logic(MVL)is proposed.The systolic structure of the operation employs multiple-valued current mode(MVCM)by using dynamic source-coupled logic(SCL)to reduce the transistor and wire counts,and the initial delay.The performance is evaluated by HSPICE simulation with 0.18.μm CMOS technology.A comparison is conducted between our proposed implementation and those reported in the literature.The transistor counts,the wire counts and the initial delay in our MVL design show savings of about 23%,45%,and 72%,in comparison with the corresponding binary CMOS implementation.The systolic architecture proposed is simple,regular,and modular,well suited for very large scale integration(VLSI)implementation.The combination of MVCM circuits and relevant algorithms based on MVL seems to be a potential solution for high performance arithmetic operations in GF(2^k). 展开更多
关键词 multiple-valued logic(MVL) AB^2 operation Galois Fields
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HAAR EXPANSIONS OF A CLASS OF FRACTAL INTERPOLATION FUNCTIONS AND THEIR LOGICAL DERIVATIVES 认领 引用 被引量：1
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作者 Sha Zhen Chen Gang Zhejiang University,China 《Analysis in Theory and Applications》 1993年第4期73-88,共16页
In this paper,we study a special class of fractal interpolation functions,and give their Haar-wavelet expansions.On the basis of the expansions,we investigate the H(o|¨)lder smoothness of such functions and their... In this paper,we study a special class of fractal interpolation functions,and give their Haar-wavelet expansions.On the basis of the expansions,we investigate the H(o|¨)lder smoothness of such functions and their logical derivatives of order α. 展开更多
关键词 HAAR EXPANSIONS OF A CLASS OF FRACTAL INTERPOLATION FUNCTIONS AND THEIR LOGICAL DERIVATIVES der Haar FIF
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FAULT DETECTION FOR MULTIPLE-VALUED LOGIC CIRCUITS WITH FANOUT-FREE 认领 引用 被引量：1
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作者 PanZhongliang 《Journal of Electronics(China)》 2004年第5期376-383,共8页
The single fault and multiple fault detections for multiple-valued logic circuits are studied in this paper. Firstly, it is shown that the cardinality of optimal single fault test set for fanout-free m-valued circuits... The single fault and multiple fault detections for multiple-valued logic circuits are studied in this paper. Firstly, it is shown that the cardinality of optimal single fault test set for fanout-free m-valued circuits with n primary inputs is not more than n + 1, for linear tree circuits is two, and for multiplication modulo circuits is two if n is an odd number or if n is an even number and m ＞ 3, where the optimal test set of a circuit has minimal number of test vectors. Secondly,it is indicated that the cardinality of optimal multiple fault test set for linear tree circuits with n primary inputs is 1 + [n/(m - 1)], for multiplication modulo circuits is n+ 1, for fanout-free circuits that consist of 2-input linear tree circuits and 2-input multiplication modulo circuits is not greater than n+ 1, where [x] denotes the smallest integer greater than or equal to x. Finally,the single fault location approaches of linear tree circuits and multiplication modulo circuits are presented, and all faults in the two types of circuits can be located by using a test set with n + 1 vectors. 展开更多
关键词 Multiple-valued logic Digital circuits Fault detection Single fault Multiple faults
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Logical Function Decomposition Method for Synthesis of Digital Logical System Implemented with Programmable Logic Devices (PLD) 认领 引用
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作者 Mihai Grigore Timis Alexandru Valachi +1 位作者 Alexandru Barleanu Andrei Stan 《Circuits and Systems》 2013年第7期472-477,共6页
The paper consists in the use of some logical functions decomposition algorithms with application in the implementation of classical circuits like SSI, MSI and PLD. The decomposition methods use the Boolean matrix cal... The paper consists in the use of some logical functions decomposition algorithms with application in the implementation of classical circuits like SSI, MSI and PLD. The decomposition methods use the Boolean matrix calculation. It is calculated the implementation costs emphasizing the most economical solutions. One important aspect of serial decomposition is the task of selecting “best candidate” variables for the G function. Decomposition is essentially a process of substituting two or more input variables with a lesser number of new variables. This substitutes results in the reduction of the number of rows in the truth table. Hence, we look for variables which are most likely to reduce the number of rows in the truth table as a result of decomposition. Let us consider an input variable purposely avoiding all inter-relationships among the input variables. The only available parameter to evaluate its activity is the number of “l”s or “O”s that it has in the truth table. If the variable has only “1” s or “0” s, it is the “best candidate” for decomposition, as it is practically redundant. 展开更多
关键词 Combinational Circuits Static Hazard Logic Design Boolean Functions Logical Decompositions
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Multi-agent system motion planning under temporal logic specifications and control barrier function 认领 引用 被引量：2
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作者 Xinyuan HUANG Li LI Jie CHEN 《Control Theory and Technology》 EI CSCD 2020年第3期269-278,共10页
In this paper,w e provide a novel scheme to solve the motion planning problem of multi-agent systems under high-level task specifications.First,linear temporal logic is applied to express the global task specification... In this paper,w e provide a novel scheme to solve the motion planning problem of multi-agent systems under high-level task specifications.First,linear temporal logic is applied to express the global task specification.Then an efficient and decentralized algorithm is proposed to decom pose it into local tasks.M oreover,w e use control barrier function to synthesize the local controller for each agent under the linear temporal logic motion plan with safety constraint.Finally,simulation results show the effectiveness and efficiency of our proposed scheme. 展开更多
关键词 Temporal logic multi-agent system formal methods control barrier function
Logical-Structure Modeling for Conceptual Design 认领 引用 被引量：1
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作者 孙正兴 张福炎 《Journal of Southeast University(English Edition)》 CAS 2001年第1期59-65,共7页
Based on the definition of a logic structure feature to relate logically functional requirements to geometric representation independent upon detailed geometric representation, this paper presents an idea of logical s... Based on the definition of a logic structure feature to relate logically functional requirements to geometric representation independent upon detailed geometric representation, this paper presents an idea of logical structure modeling for computer aided conceptual design and makes attempt to establish a representation formalism of logic structure modeling. The definition and representation of logical structure feature are given and an assembly module definition for supporting top down conceptual design is also proposed. The proposed scheme contributes to several aspects of conceptual design research, especially to provide elementarily a formal methodology for computer aided conceptual design system development and operation.  展开更多
关键词 conceptual design function form transformation logic structure feature representation formalism
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CONCEPTUAL MODELING BASED ON LOGICAL EXPRESSION AND EVOLVEMENT 认领 引用
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作者 YI Guodong ZHANG Shuyou +1 位作者 TAN Jianrong JI Yangjian 《Chinese Journal of Mechanical Engineering》 EI CAS 2007年第1期64-68,共5页
Aiming at the problem of abstract and polytype information modeling in product conceptual design,a method of conceptual modeling based on logical expression and evolvement is presented.Based on the logic expressions o... Aiming at the problem of abstract and polytype information modeling in product conceptual design,a method of conceptual modeling based on logical expression and evolvement is presented.Based on the logic expressions of the product conceptual design information,a fimction/logic/strucmre mapping model is set up.First,the fimction semantics is transformed into logical expressions through fimction/logic mapping.Second,the methods of logical evolvement are utilized to describe the fimction analysis,fimction/strucmre mapping and structure combination.Last,the logical structure scheme is transformed into geometrical sketch through logic/structure mapping.The conceptual design information and modeling process are described uniformly with logical methods in the model,and an effective method for computer aided conceptual design based on the model is implemented. 展开更多
关键词 Conceptual modeling Function/logic/structure mapping Logical evolvement
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FAULT DETECTION TEST SET FOR TESTABLE REALIZATIONS OF LOGIC FUNCTIONS WITH ESOP EXPRESSIONS 认领 引用
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作者 Pan Zhongliang Chen Guangju 《Journal of Electronics(China)》 2007年第2期238-244,共7页
The circuit testable realization and its fault detection for logic functions with ESOP （EXOR-Sum-Of-Products） expressions are studied. First of all, for the testable realization by using XOR gate cascade, a test set... The circuit testable realization and its fault detection for logic functions with ESOP （EXOR-Sum-Of-Products） expressions are studied. First of all, for the testable realization by using XOR gate cascade, a test set with 2n ＋ m ＋ 1 vectors for the detections of AND bridging faults and a test set with 2n ＋ m vectors for the detections of OR bridging faults are presented. Secondly, for the testable realization by using ）（OR gate tree, a test set with 2n ＋ m vectors for the detections of AND bridging faults and a test set with 3n ＋ m ＋ 1 vectors for the detections of OR bridging faults are presented. Finally, a single fault test set with n ＋ 5 vectors for the XOR gate tree realization is presented. Where n is the number of input variables and m is the number of product terms in a logic function. 展开更多
关键词 Logic functions Testable realization Fault detection Single faults Bridging faults
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Uncertainties in estimation of extrapolated annual occurence rate of earthquakes using logical tree 认领 引用
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作者 杨智娴 张培震 郑月君 《Acta Seismologica Sinica(English Edition)》 1998年第2期85-94,共10页
he logical tree methods are used for evaluate quantitatively relationship between frequency and magnitude, and deduce uncertainties of annual occurrence rate of earthquakes in the periods of lower magnitude earthqua... he logical tree methods are used for evaluate quantitatively relationship between frequency and magnitude, and deduce uncertainties of annual occurrence rate of earthquakes in the periods of lower magnitude earthquake. The uncertainties include deviations from the self-similarity of frequency-magnitude relations, different fitting methods, different methods obtained the annual occurrence rate, magnitude step used in fitting, start magnitude, error of magnitude and so on. Taking Xianshuihe River source zone as an example, we analyze uncertainties of occurrence rate of earthquakes M4, which is needed in risk evaluation extrapolating from frequency-magnitude relations of stronger earthquakes. The annual occurrence rate of M4 is usually required for seismic hazard assessment.The sensitivity analysis and examinations indicate that, in the same frequencymagnitude relations fitting method, the most sensitive factor is annual occurrence rate, the second is magnitude step and the following is start magnitude. Effect of magnitude error is rather small.Procedure of estimating the uncertainties is as follows:①Establishing a logical tree described uncertainties in frequencymagnitude relations by available data and knowledge about studied region.② Calculating frequencymagnitude relations for each end branches. ③ Examining sensitivities of each uncertainty factors, amending structure of logical tree and adjusting original weights. ④ Recalculating frequencymagnitude relations of end branches and complementary cumulative distribution function (CCDF) in each magnitude intervals.⑤ Obtaining an annual occurrence rate of M4 earthquakes under given fractiles.Taking fractiles as 20% and 80%, annual occurrence rate of M 4 events in Xianshuihe seismic zone is 0.643 0. The annual occurrence rate is 0.631 8 under fractiles of 50%, which is very close to that under fractiles 20% and 80%. 展开更多
关键词 logical tree uncertainty frequency-magnitude relation seismic hazard assessment Xi-anshuihe source region complementary cumulative distribution function (CCDF)
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Fuzzy logic controller design with unevenly-distributed membership function for high performance chamber cooling system 认领 引用 被引量：2
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作者 曹健鹏 Seok-Kwon Jeong Young-Mi Jung 《Journal of Central South University》 SCIE EI CAS 2014年第7期2684-2692,共9页
Fuzzy logic controller adopting unevenly-distributed membership function was presented with the purpose of enhancing performance of the temperature control precision and robustness for the chamber cooling system.Histo... Fuzzy logic controller adopting unevenly-distributed membership function was presented with the purpose of enhancing performance of the temperature control precision and robustness for the chamber cooling system.Histogram equalization and noise detection were performed to modify the evenly-distributed membership functions of error and error change rate into unevenly-distributed membership functions.Then,the experimental results with evenly and unevenly distributed membership functions were compared under the same outside environment conditions.The experimental results show that the steady-state error is reduced around 40% and the noise disturbance is rejected successfully even though noise range is 60% of the control precision range.The control precision is improved by reducing the steady-state error and the robustness is enhanced by rejecting noise disturbance through the fuzzy logic controller with unevenly-distributed membership function.Moreover,the system energy efficiency and lifetime of electronic expansion valve(EEV) installed in chamber cooling system are improved by adopting the unevenly-distributed membership function. 展开更多
关键词 chamber cooling system fuzzy logic controller unevenly-distributed membership function steady-state error reduction robustness variable speed refrigeration system
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基于深度学习的自动驾驶安全规范生成方法 认领 引用
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作者 刘璐 魏景亮 +3 位作者 邰若晨 周纯杰 杨立仁 蒋术语 《信息与控制》 CSCD 北大核心 2026年第2期353-368,384,共16页
针对自动驾驶系统在动态交通环境下面临网络攻击的威胁,现有安全规范构建方法难以同时覆盖功能安全、信息安全与预期功能安全等多源安全需求问题,提出了一种面向自动驾驶系统的安全规范生成框架。首先,基于多源安全需求构建了统一的信... 针对自动驾驶系统在动态交通环境下面临网络攻击的威胁,现有安全规范构建方法难以同时覆盖功能安全、信息安全与预期功能安全等多源安全需求问题,提出了一种面向自动驾驶系统的安全规范生成框架。首先,基于多源安全需求构建了统一的信号时序逻辑(STL)语义空间,为规范生成提供形式化语义基础。其次,结合参数化场景建模与攻击注入机制,构建了覆盖正常行为与攻击诱发行为的自动驾驶场景,从而为规范生成提供结构化轨迹空间。最后,设计了基于Transformer的结构与参数协同学习模型,通过双分支推断机制生成STL安全规范。高保真仿真与实物实验的结果表明,所提方法在多类驾驶场景与攻击条件下均能稳定生成具有明确物理语义的STL安全规范,结构预测准确率达到89.1%,并且对安全距离、剩余碰撞时间等关键参数均达到91.0%以上的预测准确率。 展开更多
关键词 自动驾驶 功能安全 信息安全 信号时序逻辑 规范生成 深度学习
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基于认知逻辑重构与图形化教学的“波函数”教学设计——结构化学量子力学基础 认领 引用
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作者 李海蓓 沙沙 +3 位作者 王欣妍 戚明颖 乔丽娜 周美娟 《化学教育（中英文）》 CAS 北大核心 2026年第12期13-20,共8页
波函数是结构化学课程的核心概念,但其抽象性和数学复杂性给学生对概念的理解带来显著障碍。为解决这一难题,设计并实施了一套以“波函数认知逻辑框架”为核心的全新教学方案。通过Stern-Gerlach级联实验引导学生建立本征态与叠加态的概... 波函数是结构化学课程的核心概念,但其抽象性和数学复杂性给学生对概念的理解带来显著障碍。为解决这一难题,设计并实施了一套以“波函数认知逻辑框架”为核心的全新教学方案。通过Stern-Gerlach级联实验引导学生建立本征态与叠加态的概念,从叠加态的数学形式引出态矢量,再借助图形化表达从态矢量在不同表象下的投影过渡到波函数。教学设计遵循“从已知到未知、从实验现象到抽象概念、从数学形式到物理图像、从抽象到具体”的原则,并全程辅以概念与数学的图形化教学。教学实践表明,新的教学设计能有效提升学生对波函数的由来、含义及应用的深度理解。 展开更多
关键词 波函数 态矢量 本征态 叠加态 认知逻辑 图形化教学
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基于PLCopen的伺服系统在线辨识与自适应控制方法 认领 引用
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作者 吴继春 徐志论 +2 位作者 张平 李宝宇 范大鹏 《计算机集成制造系统》 EI CSCD 北大核心 2026年第5期1770-1782,共13页
PLC伺服系统广泛应用于无人机、工业机器人等精密制造装备,而制造装备工况变化引起的惯量变化以及非线性摩擦扰动会影响系统控制性能,传统控制方法难以对其补偿达到理想性能。针对该问题,提出一种基于PLCopen的在线辨识与自适应控制方... PLC伺服系统广泛应用于无人机、工业机器人等精密制造装备,而制造装备工况变化引起的惯量变化以及非线性摩擦扰动会影响系统控制性能,传统控制方法难以对其补偿达到理想性能。针对该问题,提出一种基于PLCopen的在线辨识与自适应控制方法。首先,建立伺服系统的动力学模型,并针对非线性库伦摩擦引起的辨识偏差问题,提出无偏递推最小二乘法实现了动力学参数在线辨识。其次,基于辨识结果设计了自适应复合控制策略并通过PLC Coder生成PLCopen功能块以用于实际伺服系统。实验结果表明,提出的参数辨识方法能够准确辨识出伺服系统动力学参数,且辨识精度优于基本最小二乘法。相较于其他两种定值控制方法,所提自适应控制方法在速度跟踪和稳定性方面表现出一定优势,在带载条件下的速度跟踪精度分别提升了34.8%和18.9%,稳定精度分别提升了64%和34.7%。研究成果为PLC伺服系统高性能运动控制提供了一定参考。 展开更多
关键词 PLC伺服系统 PLCopen功能块 在线辨识 自适应控制 跟踪精度
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信号、责任与资源:部门核心职能评估的制度逻辑与优化路径 认领 引用
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作者 盛明科 鲁毅 《贵州师范大学学报（社会科学版）》 CSSCI 2026年第4期61-71,共11页
在高质量发展与基层减负背景下,如何实现对政府部门核心职能的精准识别与责任压实,已成为深化机构编制改革的关键议题。通过引入信号理论,构建“信号—责任—资源”传导链条,探讨核心职能评估如何通过显性与隐性信号、主信号与噪音信号... 在高质量发展与基层减负背景下,如何实现对政府部门核心职能的精准识别与责任压实,已成为深化机构编制改革的关键议题。通过引入信号理论,构建“信号—责任—资源”传导链条,探讨核心职能评估如何通过显性与隐性信号、主信号与噪音信号等塑造组织行为与责任分配。基于地方政府的实践分析,发现部门核心职能评估的推进面临信号偏误、策略博弈与能力失衡等现实梗阻。为此,必须推动信号再设计、责任再锚定与资源再联动,构建精准问责与职能聚焦的闭环体系,实现机构治理向精细化、责任化转型。 展开更多
关键词 核心职能评估 编制资源 信号理论 制度逻辑
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基于RFLP方法的汽车自动驾驶系统架构设计 认领 引用
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作者 董梦如 王国新 +3 位作者 鲁金直 马君达 宋兴 阎艳 《系统工程与电子技术》 EI CSCD 北大核心 2026年第8期2680-2700,共21页
针对汽车自动驾驶系统设计存在全局视角缺失、知识传递与复用困难,现有建模方法依赖单一建模语言、难以满足多层级协同与多学科交叉建模需求等问题,提出一种基于需求-功能-逻辑-物理的自动驾驶系统建模方法。构建覆盖需求分析、功能分... 针对汽车自动驾驶系统设计存在全局视角缺失、知识传递与复用困难,现有建模方法依赖单一建模语言、难以满足多层级协同与多学科交叉建模需求等问题,提出一种基于需求-功能-逻辑-物理的自动驾驶系统建模方法。构建覆盖需求分析、功能分析、逻辑架构和物理架构的多层级建模流程,建立层级间映射关系,实现需求向系统架构的逐层传递与追溯,支撑后续基于模型的系统验证。以汽车自动驾驶系统为对象开展建模验证,结果表明,所提方法有效提升建模规范性、一致性和可追溯性,为复杂自动驾驶系统设计提供方法支撑。 展开更多
关键词 自动驾驶系统 基于模型的系统工程 建模方法论 建模语言 需求-功能-逻辑-物理
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