Atomic layer deposited (ALD) Al2O3/dry-oxidized ultrathin SiO2 films as a high-k gate dielectric grown on 8° off-axis 4H-SiC (0001) epitaxial wafers are investigated in this paper. The metal-insulation-semico...Atomic layer deposited (ALD) Al2O3/dry-oxidized ultrathin SiO2 films as a high-k gate dielectric grown on 8° off-axis 4H-SiC (0001) epitaxial wafers are investigated in this paper. The metal-insulation-semiconductor (MIS) capacitors, respectively with different gate dielectric stacks (Al2O3/SiO2, Al2O3, and SiO2) are fabricated and compared with each other. The I-V measurements show that the Al2O3/SiO2 stack has a high breakdown field (≥12 MV/cm) comparable to SiO2, and a relatively low gate leakage current of 1 × 10-7 A/cm2 at an electric field of 4 MV/cm comparable to Al2O3. The 1-MHz high frequency C-V measurements exhibit that the Al2O3/SiO2 stack has a smaller positive flat-band voltage shift and hysteresis voltage, indicating a less effective charge and slow-trap density near the interface.展开更多
High-k materials as an alternative dielectric layer for SiC power devices have the potential to reduce interfacial state defects and improve MOS channel conduction capability.Besides,under identical conditions of gate...High-k materials as an alternative dielectric layer for SiC power devices have the potential to reduce interfacial state defects and improve MOS channel conduction capability.Besides,under identical conditions of gate oxide thickness and gate voltage,the high-k dielectric enables a greater charge accumulation in the channel region,resulting in a larger number of free electrons available for conduction.However,the lower energy band gap of high-k materials leads to significant leakage currents at the interface with Si C,which greatly affects device reliability.By inserting a layer of SiO2between the high-k material and Si C,the interfacial barrier can be effectively widened and hence the leakage current will be reduced.In this study,the optimal thickness of the intercalated SiO2was determined by investigating and analyzing the gate dielectric breakdown voltage and interfacial defects of a dielectric stack composed of atomic-layer-deposited Al2O3layer and thermally nitride SiO2.Current-voltage and high-frequency capacitance-voltage measurements were performed on metal-oxide-semiconductor test structures with 35 nm thick Al2O3stacked on 1 nm,2 nm,3 nm,6 nm,or 9 nm thick nitride SiO2.Measurement results indicated that the current conducted through the oxides was affected by the thickness of the nitride oxide and the applied electric field.Finally,a saturation thickness of stacked SiO2that contributed to dielectric breakdown and interfacial band offsets was identified.The findings in this paper provide a guideline for the SiC gate dielectric stack design with the breakdown strength and the interfacial state defects considered.展开更多
Nano-Al2O3 particles modified Ag Cu Ni filler was adopted to braze the SiO2 ceramic and TC4.The effects of filler size as well as the brazing temperature on the interfacial microstructure and mechanical property of th...Nano-Al2O3 particles modified Ag Cu Ni filler was adopted to braze the SiO2 ceramic and TC4.The effects of filler size as well as the brazing temperature on the interfacial microstructure and mechanical property of the joints were investigated.Nanoscale filler reduced the phases dimension and promoted the homogeneous distribution of microstructure,obtaining a higher joint strength when compared to microscale filler.The increase of brazing temperature made the accelerating dissolution and diffusion of Ti,which promoted the increase of thickness of Ti4O7+TiSi2 layer adjacent to SiO2 ceramic and diffusion layer zone nearby TC4 alloy.The hypoeutectic structure was produced in the brazing seam due to the high Ti content.The maximum shear strength of^40 MPa was obtained at 950°C for 10 min.展开更多
The deposition of NH4 HSO4 and the poisoning effect of SO2 on SCR catalyst are the main obstacles that restrict the industrial application of CeO2-doped SCR catalysts.In this work,deposited NH4 HSO4 decomposition beha...The deposition of NH4 HSO4 and the poisoning effect of SO2 on SCR catalyst are the main obstacles that restrict the industrial application of CeO2-doped SCR catalysts.In this work,deposited NH4 HSO4 decomposition behavior and SO2 poisoning over V2 O5-MoO3/TiO2 catalysts modified with CeO2 and SiO2 were investigated.By the means of characterization analysis,it was found that the addition of SiO2 into VMo/Ti-Ce had an impact on the interaction existed between catalyst surface atoms and NH4 HSO4.Temperatureprogrammed methods and in situ diffused reflectance infrared Fourier transform spectroscopy(DRIFTS)experiments indicated that the doping of SiO2 promoted the decomposition of deposited NH4 HSO4 on VMo/Ti-Ce catalyst surface by reducing the thermal stability of NH4 HSO4 and enhancing the NH4 HSO4 reactivity with NO in low temperature.And this improvement may be the reason for the better catalytic activity than VMo/Ti-Ce in the case of NH4 HSO4 deposition.Accompanied with cerium sulfate species generated over catalyst surface,the conversion of SO2 to SO3 was inhibited in SiCe mixed catalyst.The addition of SiO2 could promote the decomposition of cerium sulfate,which may be a potential strategy to enhance the resistance of SO2 poisoning over CeO2-modifed catalysts.展开更多
Eu2+ and (or) Eu3+ doped Sr2SiO4 phosphors particles were synthesized by a conventional solid-state reaction technique, and their structural and optical properties were investigated. The X-ray diffraction (XRD) ...Eu2+ and (or) Eu3+ doped Sr2SiO4 phosphors particles were synthesized by a conventional solid-state reaction technique, and their structural and optical properties were investigated. The X-ray diffraction (XRD) results showed that the obtained phosphors were composed of orthorhombic α′-Sr2SiO4 and monoclinic β-Sr2SiO4 phase. When excited under 256 nm, Sr2SiO4:Eu3+ phosphors showed intense emission in the red region. Sr2SiO4:Eu3+ phosphors exhibited white emissions (x=0.30, y=0.40, Tc=6500 K) ranging from 425 to 650 nm when it was excited by near-ultraviolet (near-UV) light, indicating that Sr2SiOn:Eu2+ was a good light-conversion phosphor candidate for near-UV chip.展开更多
基金Project supported by the National Natural Science Foundation of China (Grant Nos. 61006060 and 61176070).
摘要Atomic layer deposited (ALD) Al2O3/dry-oxidized ultrathin SiO2 films as a high-k gate dielectric grown on 8° off-axis 4H-SiC (0001) epitaxial wafers are investigated in this paper. The metal-insulation-semiconductor (MIS) capacitors, respectively with different gate dielectric stacks (Al2O3/SiO2, Al2O3, and SiO2) are fabricated and compared with each other. The I-V measurements show that the Al2O3/SiO2 stack has a high breakdown field (≥12 MV/cm) comparable to SiO2, and a relatively low gate leakage current of 1 × 10-7 A/cm2 at an electric field of 4 MV/cm comparable to Al2O3. The 1-MHz high frequency C-V measurements exhibit that the Al2O3/SiO2 stack has a smaller positive flat-band voltage shift and hysteresis voltage, indicating a less effective charge and slow-trap density near the interface.
基金Project supported by the Key Area Research and Development Program of Guangdong Province of China(Grant No.2021B0101300005)the National Key Research and Development Program of China(Grant No.2021YFB3401603)。
摘要High-k materials as an alternative dielectric layer for SiC power devices have the potential to reduce interfacial state defects and improve MOS channel conduction capability.Besides,under identical conditions of gate oxide thickness and gate voltage,the high-k dielectric enables a greater charge accumulation in the channel region,resulting in a larger number of free electrons available for conduction.However,the lower energy band gap of high-k materials leads to significant leakage currents at the interface with Si C,which greatly affects device reliability.By inserting a layer of SiO2between the high-k material and Si C,the interfacial barrier can be effectively widened and hence the leakage current will be reduced.In this study,the optimal thickness of the intercalated SiO2was determined by investigating and analyzing the gate dielectric breakdown voltage and interfacial defects of a dielectric stack composed of atomic-layer-deposited Al2O3layer and thermally nitride SiO2.Current-voltage and high-frequency capacitance-voltage measurements were performed on metal-oxide-semiconductor test structures with 35 nm thick Al2O3stacked on 1 nm,2 nm,3 nm,6 nm,or 9 nm thick nitride SiO2.Measurement results indicated that the current conducted through the oxides was affected by the thickness of the nitride oxide and the applied electric field.Finally,a saturation thickness of stacked SiO2that contributed to dielectric breakdown and interfacial band offsets was identified.The findings in this paper provide a guideline for the SiC gate dielectric stack design with the breakdown strength and the interfacial state defects considered.
基金supported by National Natural Science Foundation of China(Grant Nos.51505105,51875130 and 51775138)the Key Research&Development Program of Shandong Province(No.2017GGX40103).
摘要Nano-Al2O3 particles modified Ag Cu Ni filler was adopted to braze the SiO2 ceramic and TC4.The effects of filler size as well as the brazing temperature on the interfacial microstructure and mechanical property of the joints were investigated.Nanoscale filler reduced the phases dimension and promoted the homogeneous distribution of microstructure,obtaining a higher joint strength when compared to microscale filler.The increase of brazing temperature made the accelerating dissolution and diffusion of Ti,which promoted the increase of thickness of Ti4O7+TiSi2 layer adjacent to SiO2 ceramic and diffusion layer zone nearby TC4 alloy.The hypoeutectic structure was produced in the brazing seam due to the high Ti content.The maximum shear strength of^40 MPa was obtained at 950°C for 10 min.
基金supported by the National Natural Science Foundation of China(No.51576039)
摘要The deposition of NH4 HSO4 and the poisoning effect of SO2 on SCR catalyst are the main obstacles that restrict the industrial application of CeO2-doped SCR catalysts.In this work,deposited NH4 HSO4 decomposition behavior and SO2 poisoning over V2 O5-MoO3/TiO2 catalysts modified with CeO2 and SiO2 were investigated.By the means of characterization analysis,it was found that the addition of SiO2 into VMo/Ti-Ce had an impact on the interaction existed between catalyst surface atoms and NH4 HSO4.Temperatureprogrammed methods and in situ diffused reflectance infrared Fourier transform spectroscopy(DRIFTS)experiments indicated that the doping of SiO2 promoted the decomposition of deposited NH4 HSO4 on VMo/Ti-Ce catalyst surface by reducing the thermal stability of NH4 HSO4 and enhancing the NH4 HSO4 reactivity with NO in low temperature.And this improvement may be the reason for the better catalytic activity than VMo/Ti-Ce in the case of NH4 HSO4 deposition.Accompanied with cerium sulfate species generated over catalyst surface,the conversion of SO2 to SO3 was inhibited in SiCe mixed catalyst.The addition of SiO2 could promote the decomposition of cerium sulfate,which may be a potential strategy to enhance the resistance of SO2 poisoning over CeO2-modifed catalysts.
基金supported by the grants from the Natural Science Foundation of Zhejiang Province (Y406309)Research Program from Science and Technology Bureau of Jinhua City (2008-1-151)
摘要Eu2+ and (or) Eu3+ doped Sr2SiO4 phosphors particles were synthesized by a conventional solid-state reaction technique, and their structural and optical properties were investigated. The X-ray diffraction (XRD) results showed that the obtained phosphors were composed of orthorhombic α′-Sr2SiO4 and monoclinic β-Sr2SiO4 phase. When excited under 256 nm, Sr2SiO4:Eu3+ phosphors showed intense emission in the red region. Sr2SiO4:Eu3+ phosphors exhibited white emissions (x=0.30, y=0.40, Tc=6500 K) ranging from 425 to 650 nm when it was excited by near-ultraviolet (near-UV) light, indicating that Sr2SiOn:Eu2+ was a good light-conversion phosphor candidate for near-UV chip.