This study embarks on a comprehensive examination of optimization techniques within GPU-based parallel programming models,pivotal for advancing high-performance computing(HPC).Emphasizing the transition of GPUs from g...This study embarks on a comprehensive examination of optimization techniques within GPU-based parallel programming models,pivotal for advancing high-performance computing(HPC).Emphasizing the transition of GPUs from graphic-centric processors to versatile computing units,it delves into the nuanced optimization of memory access,thread management,algorithmic design,and data structures.These optimizations are critical for exploiting the parallel processing capabilities of GPUs,addressingboth the theoretical frameworks and practical implementations.By integrating advanced strategies such as memory coalescing,dynamic scheduling,and parallel algorithmic transformations,this research aims to significantly elevate computational efficiency and throughput.The findings underscore the potential of optimized GPU programming to revolutionize computational tasks across various domains,highlighting a pathway towards achieving unparalleled processing power and efficiency in HPC environments.The paper not only contributes to the academic discourse on GPU optimization but also provides actionable insights for developers,fostering advancements in computational sciences and technology.展开更多
Heterogeneous many-cores are now an integral part of modern computing systems ranging from embedding systems to supercomputers.While heterogeneous many-core design offers the potential for energy-efficient high-perfor...Heterogeneous many-cores are now an integral part of modern computing systems ranging from embedding systems to supercomputers.While heterogeneous many-core design offers the potential for energy-efficient high-performance,such potential can only be unlocked if the application programs are suitably parallel and can be made to match the underlying heterogeneous platform.In this article,we provide a comprehensive survey for parallel programming models for heterogeneous many-core architectures and review the compiling techniques of improving programmability and portability.We examine various software optimization techniques for minimizing the communicating overhead between heterogeneous computing devices.We provide a road map for a wide variety of different research areas.We conclude with a discussion on open issues in the area and potential research directions.This article provides both an accessible introduction to the fast-moving area of heterogeneous programming and a detailed bibliography of its main achievements.展开更多
As the hardware industry moves toward using specialized heterogeneous many-core processors to avoid the effects of the power wall,software developers are finding it hard to deal with the complexity of these systems.In...As the hardware industry moves toward using specialized heterogeneous many-core processors to avoid the effects of the power wall,software developers are finding it hard to deal with the complexity of these systems.In this paper,we share our experience of developing a programming model and its supporting compiler and libraries for Matrix-3000,which is designed for next-generation exascale supercomputers but has a complex memory hierarchy and processor organization.To assist its software development,we have developed a software stack from scratch that includes a low-level programming interface and a high-level OpenCL compiler.Our low-level programming model offers native programming support for using the bare-metal accelerators of Matrix-3000,while the high-level model allows programmers to use the OpenCL programming standard.We detail our design choices and highlight the lessons learned from developing system software to enable the programming of bare-metal accelerators.Our programming models have been deployed in the production environment of an exascale prototype system.展开更多
SYCL is a modern royalty-free heterogeneous programming specification maintained by the Khronos Group.Recently,it has become increasingly more prevalent and matured,leading to various assessments of its performance,po...SYCL is a modern royalty-free heterogeneous programming specification maintained by the Khronos Group.Recently,it has become increasingly more prevalent and matured,leading to various assessments of its performance,portability,and programmability.While previous evaluations have mainly focused on X86 CPUs,NVIDIA GPUs,and AMD GPUs,how well SYCL performs on ARM multi-core CPUs is still unknown.In this paper,we evaluate three SYCL implementations(i.e.,DPCPP,AdaptiveCPP,and MLIR-SYCL)on ARM multi-core CPUs,to uncover performance traps and offer optimization techniques.We use the SYCL-Bench benchmark suite to assess the performance of DPCPP,AdaptiveCPP,and MLIR-SYCL against their OpenMP counterparts.We also assess the compiler and runtime overhead to evaluate the usability and productivity of the SYCL implementations.Our empirical results demonstrate that these SYCL implementations can achieve satisfactory performance on ARM multi-core processors.Additionally,we highlight several key optimizations,such as NUMA management,which must be carefully addressed to enhance performance.展开更多
Thread level speculation provides not only a simple parallel programming model,but also an effective mech-anism for thread-level parallelism exploitation.The performance of software speculative parallel models is limi...Thread level speculation provides not only a simple parallel programming model,but also an effective mech-anism for thread-level parallelism exploitation.The performance of software speculative parallel models is limited by high global overheads caused by different types of loops.These loops usually have different characteristics of dependencies and different requirements of optimization strategies.In this paper,we propose three comprehensive optimization techniques to reduce different factors of global overheads,aiming at requirements from different types of loops.Inter-thread fetching can reduce the high mis-speculation rate of the loops with frequent dependencies and out-of-order committing can reduce the control overhead of the loops with infrequent dependencies,while enhanced dynamic task granularity resizing can reduce the control overhead and optimize the global overhead of the loops with changing characteristics of dependencies.All these three optimization techniques have been implemented in HEUSPEC~a software TLS system.Experimental results indicate that they can satisfy tile demands from different groups of benchmarks.The combination of these techniques can improve the performance of all benchmarks and reach a higher average speedup.展开更多
摘要This study embarks on a comprehensive examination of optimization techniques within GPU-based parallel programming models,pivotal for advancing high-performance computing(HPC).Emphasizing the transition of GPUs from graphic-centric processors to versatile computing units,it delves into the nuanced optimization of memory access,thread management,algorithmic design,and data structures.These optimizations are critical for exploiting the parallel processing capabilities of GPUs,addressingboth the theoretical frameworks and practical implementations.By integrating advanced strategies such as memory coalescing,dynamic scheduling,and parallel algorithmic transformations,this research aims to significantly elevate computational efficiency and throughput.The findings underscore the potential of optimized GPU programming to revolutionize computational tasks across various domains,highlighting a pathway towards achieving unparalleled processing power and efficiency in HPC environments.The paper not only contributes to the academic discourse on GPU optimization but also provides actionable insights for developers,fostering advancements in computational sciences and technology.
基金partially funded by the National Key Research and Development Program of China under Grant No.2018YFB0204301the National Natural Science Foundation of China under Grant agreements 61972408,61602501 and 61872294a UK Royal Society International Collaboration Grant.
摘要Heterogeneous many-cores are now an integral part of modern computing systems ranging from embedding systems to supercomputers.While heterogeneous many-core design offers the potential for energy-efficient high-performance,such potential can only be unlocked if the application programs are suitably parallel and can be made to match the underlying heterogeneous platform.In this article,we provide a comprehensive survey for parallel programming models for heterogeneous many-core architectures and review the compiling techniques of improving programmability and portability.We examine various software optimization techniques for minimizing the communicating overhead between heterogeneous computing devices.We provide a road map for a wide variety of different research areas.We conclude with a discussion on open issues in the area and potential research directions.This article provides both an accessible introduction to the fast-moving area of heterogeneous programming and a detailed bibliography of its main achievements.
基金Project supported by the National Key Research and Development Program of China(No.2021YFB0300101)the National Natural Science Foundation of China(No.61972408)the UK Royal Society International Collaboration Grant。
摘要As the hardware industry moves toward using specialized heterogeneous many-core processors to avoid the effects of the power wall,software developers are finding it hard to deal with the complexity of these systems.In this paper,we share our experience of developing a programming model and its supporting compiler and libraries for Matrix-3000,which is designed for next-generation exascale supercomputers but has a complex memory hierarchy and processor organization.To assist its software development,we have developed a software stack from scratch that includes a low-level programming interface and a high-level OpenCL compiler.Our low-level programming model offers native programming support for using the bare-metal accelerators of Matrix-3000,while the high-level model allows programmers to use the OpenCL programming standard.We detail our design choices and highlight the lessons learned from developing system software to enable the programming of bare-metal accelerators.Our programming models have been deployed in the production environment of an exascale prototype system.
摘要SYCL is a modern royalty-free heterogeneous programming specification maintained by the Khronos Group.Recently,it has become increasingly more prevalent and matured,leading to various assessments of its performance,portability,and programmability.While previous evaluations have mainly focused on X86 CPUs,NVIDIA GPUs,and AMD GPUs,how well SYCL performs on ARM multi-core CPUs is still unknown.In this paper,we evaluate three SYCL implementations(i.e.,DPCPP,AdaptiveCPP,and MLIR-SYCL)on ARM multi-core CPUs,to uncover performance traps and offer optimization techniques.We use the SYCL-Bench benchmark suite to assess the performance of DPCPP,AdaptiveCPP,and MLIR-SYCL against their OpenMP counterparts.We also assess the compiler and runtime overhead to evaluate the usability and productivity of the SYCL implementations.Our empirical results demonstrate that these SYCL implementations can achieve satisfactory performance on ARM multi-core processors.Additionally,we highlight several key optimizations,such as NUMA management,which must be carefully addressed to enhance performance.
基金supported by the National High Technology Research and Development 863 Program of China under Grant No.2012AA010905the National Natural Science Foundation of China under Grant Nos.61272143 and 61472431.
摘要Thread level speculation provides not only a simple parallel programming model,but also an effective mech-anism for thread-level parallelism exploitation.The performance of software speculative parallel models is limited by high global overheads caused by different types of loops.These loops usually have different characteristics of dependencies and different requirements of optimization strategies.In this paper,we propose three comprehensive optimization techniques to reduce different factors of global overheads,aiming at requirements from different types of loops.Inter-thread fetching can reduce the high mis-speculation rate of the loops with frequent dependencies and out-of-order committing can reduce the control overhead of the loops with infrequent dependencies,while enhanced dynamic task granularity resizing can reduce the control overhead and optimize the global overhead of the loops with changing characteristics of dependencies.All these three optimization techniques have been implemented in HEUSPEC~a software TLS system.Experimental results indicate that they can satisfy tile demands from different groups of benchmarks.The combination of these techniques can improve the performance of all benchmarks and reach a higher average speedup.